January 24, 2007

What is low latency memory?

Memory Latency

If you are going to buy a memory (RAM) you needed to know whether your PC takes SD, DDR or DDR-II memory and find out the max frequency supported by your motherboard, whether it’s DDR 266, 333,400,533 or 600.And also regular memory or low latency memory?, and the price of the memory. Low latency memory to be significantly better than the regular memory and also price is little higher. High-speed low latency memories have made their way into the market, targeting the enthusiasts and power users who demand sound performance for their system. About 90 percent users opt for the regular memory modules, which are priced well while 10 percent go for the low latency chips selling at a higher price.

What is low latency memory?

Latency is the period between stimulation and response. Memory latency is the delay caused by the memory to react towards a particular command. The delay in memory access is the latency of that memory and it’s measured at various stages of memory access. Typically, memory timings on the module are specified as 2-2-2-5 where the string of timings correspond to the CAS-tRCD-tRP-tRAS. It might be complicated but it’s not all that complex if we learn about it and get a low down on how it works.

CAS: CAS stands for Column Address Strobe. This is the number of memory cycles that pass between the time a column is requested from the active page and the time the data is ready to send across the bus. This number is usually 2, 2.5, and 3 for DDR memory.

tRCD: RAS to CAS Delay is referred to as tRCD. This is the delay in memory cycles between the time a row is activated and when data within the row can be requested. This only happens when data is not on the active row.

tRP: tRP is the time for RAS Precharge. It’s the time required in memory cycles to clear out the active row out of the cache, before a new row can be requested. In other words, it’s the time taken for the memory to stop accessing one row and start accessing another.

tRAS: tRAS refers to the minimum time that a row must remain active before a new row can be activated in each memory bank. A new row cannot be opened until the minimum amount of time has passed. If there is more than one bank on memory, this will help the performance of the tRAS. If there is only one active bank, then the need to change rows is guaranteed, and if there is more than one bank with memory, then there is only half the chance that there will be a need to change rows. In turn, the tRAS will only come into effect half the time. The tRP and tRAS together are often referred to as the Row Cycle time, because they happen together.

It is also needs to remember that as the data rate (FSB) goes higher, the latency also increases. Thus latencies for a 512 MB stick of DDR 333 or DDR 400 MHz are lower than for DDR-II 533 or DDR-II 600. Since the bandwidth is higher, the time taken for access and reaction is also more than in case of lower bandwidth memory. These low latency memory modules are primarily targeted at demanding gamers who thrive for latest games. For an average user with a regular system configuration, low latency memory makes little sense. Instead of spending more money on low latency memory, better to buy additional RAM which will increase the performance of almost all applications.

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